Power Optimization of 8:1 MUX using Transmission Gate Logic (TGL) with Power Gating Technique

نویسندگان
چکیده

برای دانلود رایگان متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Power Optimization of 8:1 MUX using Transmission Gate Logic (TGL) with Power Gating Technique

This paper aims at reducing power and energy dissipation in Transmission Gate Logic (TGL) Multiplexer CMOS circuits comprise of reducing the power supply voltages, power supply current and delay with economical charge recovery logic. This paper designs an 8:1 Multiplexer with CMOS Transmission Gate Logic (TGL) using the Power Gating Technique, which reduces the leakage power and leakage current...

متن کامل

Ultra Low Power Symmetric Pass Gate Adiabatic Logic with CNTFET for Secure IoT Applications

With the advent and development of the Internet of Things, new needs arose and more attention was paid to these needs. These needs include: low power consumption, low area consumption, low supply voltage, higher security and so on. Many solutions have been proposed to improve each one of these needs. In this paper, we try to reduce the power consumption and enhance the security by using SPGAL, ...

متن کامل

A Parallel Architecture Design of Low Power Divide by N using Transmission Gate Logic Circuit

This paper discusses the low supply voltage area and power optimize counter design using deep sub micron technology. The flip flop circuit design with less number of transistors which uses pass transistor base transmission gate logic. Design using transmission gate reduces the stray capacitances. The design circuit enhances the working frequency due to the reduction of number of transistors, in...

متن کامل

Analysis and optimization of Active Power and Delay of 10T Full Adder using Power Gating Technique at 45 nm Technology

An overview of performance analysis and comparison between various parameters of a low power high speed 10T full adder has been presented here. This paper shows comparative study of advancement over active power, leakage current and delay with power supply of (0.7v) .We have achieved reduction in active power consumption of 39.20 nW and propagation delay of 10.51 ns, which makes this circuit hi...

متن کامل

Design of Low Power Cmos Logic Circuits Using Gate Diffusion Input (gdi) Technique

The Gate diffusion input (GDI) is a novel technique for low power digital circuit design. This technique reduces the power dissipation, propagation delay, area of digital circuits and it maintains low complexity of logic design. In this paper, the 4×1 Multiplexer, 8×3 Encoder, BCD Counter and Mealy State Machine were implemented by using Pass Transistors (PT), Transmission Gate (TG) and Gate Di...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

ژورنال

عنوان ژورنال: International Journal of Computer Applications

سال: 2014

ISSN: 0975-8887

DOI: 10.5120/17373-7911